Hardware Design Manual
Disclaimer
This document serves as a reference for system design using Nuvoton’s NuMicro microcontrollers (NUC980DR63YC). Specifications may change without notice. Nuvoton is not liable for any errors or omissions.
Introduction
This guide explains how to implement an Out-Of-Band (OOB) Enabler using ERMI (Edge Remote Management Interface) Controller Bundle. The ERMI Controller Bundle can be either embedded directly into the motherboard or connected externally to the main board (ERMI Module), depending on the system design.
Pin Configuration
The pinout diagram of the NUC980DR63YC is shown below. It illustrates the connections between the microprocessor and the edge device.
Pinout Diagram
ERMI Standard Configuration
| PIN Description | PIN NUMBER | Group |
|---|---|---|
| RMII1_MDC | 51 | PF.9 |
| RMII1_MDIO | 50 | PF.8 |
| RMII1_TXD0 or NCSI_TXD0 | 49 | PF.7 |
| RMII1_TXD1 or NCSI_TXD1 | 47 | PF.6 |
| RMII1_TXEN or NCSI_TXEN | 46 | PF.5 |
| RMII1_REFCLK or Pull Low for NCSI | 45 | PF.4 |
| RMII1_RXD0 or NCSI_RXD0 | 44 | PF.3 |
| RMII1_RXD1 or NCSI_RXD1 | 43 | PF.2 |
| RMII1_CRSDV or NCSI_CRSDV | 42 | PF.1 |
| RMII1_RXERR or Pull Low for NCSI | 41 | PF.0 |
| NVIDIA MODULE UART_RX | 2 | PA.0 |
| NVIDIA MODULE UART_TX | 3 | PA.1 |
| AutoLink UART_TX | 12 | PC.12 |
| AutoLink UART_RX | 13 | PC.13 |
| ERMI Debug UART_TX | 52 | PF.11 |
| ERMI Debug UART_RX | 53 | PF.12 |
| ERMI_PWR_LED | 19 | PC.3 |
| ERMI_NETWORK_LED | 26 | PC.11 |
| CarrierBoard_PWR DET | 20 | PC.4 |
| CarrierBoard_PWR ON | 23 | PC.8 |
| CarrierBoard_RESET | 24 | PC.9 |
| LTE MODULE_PWR_CTL | 4 | PA.2 |
| LTE MODULE_RST | 5 | PA.3 |
| W_DISABLE1_M | 6 | PA.4 |
| W_DISABLE2_M | 7 | PA.5 |
| DIO (Reserve) | 22 | PC.6 |
| USB0_ID (Host / Device Mode Sel) | 1 | |
| Booting Sel | 14 | PG.1 |
| Booting Sel | 12 | PG.0 |
| PWRDET_EN | 30 | PC.14 |
| SSD_Recovry (option) | 21 | PC.5 |
| External Sensor Integration (option) | 25 | PC.10 |
Power Supply
To ensure uninterrupted 24/7 power supply and stable operation of the ERMI Controller, the following guidelines are recommended:
- By default, use 5VSB (standby 5V) as the independent DC power input, with total power consumption kept below 0.5W.
- Depending on the specific Wi-Fi or LTE wireless communication module used, select an independent DC power input that provides at least 5VSB at 260mA, to ensure reliable performance.
For more details, please refer to the NUC980 Series Hardware Design Guide.
Power Switch and Reset
To implement the power switch function, connect NUC980’s PC.8 and VSS to the power switch pins on the edge device’s mainboard. The actual trigger logic—high or low voltage—and the signal duration may vary depending on the device model and can be customized as needed.
For reset functionality, connect NUC980’s PC.9 and VSS to the mainboard’s reset pins. Similarly, the trigger type and duration can be adjusted based on the specific requirements of the device.
For detailed configuration guidelines, please refer to User Guide 9.Actions.
LED Indicator
To ensure proper operation of LED indicators, connect the NUC980 GPIO pins PC.3 and PC.11 to the LED lights. For more detail, please refer to LED lights Indicators.
Network Factory Reset
To implement the network factory reset function, connect NUC980 GPIO PC.15 to the ERMI Controller’s physical reset button.
This allows users to restore network settings by long-pressing (2 seconds) the button. For more detail, please refer to Reset to Default.
UART Debugging
To implement the UART debugging function, connect NUC980 GPIO PF.12 (TX), PF.11 (RX), and VSS (GND) to the ERMI Controller. Set the UART baud rate to 115200 to establish proper communication between the NUC980 and the ERMI Controller.
It is also recommended to include a 2.54 mm pin header in the design for debugging purposes:
- During Development: The 2.54 mm pin header provides convenient access to the UART lines (TX, RX, GND), making it easy to connect external debugging tools and perform diagnostics.
- During Mass Production: Once the design is finalized, you may choose to retain or remove the pin header depending on whether UART debugging access is required in the final product.
Serial over LAN (UART Communication)
To enable Serial over LAN (SOL) via UART communication, connect the NUC980 GPIO pins PA.0 (TX), PA.1 (RX), and VSS to the UART port of the edge device for effective system monitoring.
This setup allows the NUC980 to collect system-level information from sources such as:
- SOM Debug UART
- x86 CPU motherboards that support BIOS console redirection via UART1
The connection typically uses TTL-level signals, and the pin mapping is as follows:
- NUC980 UART1 TX (PA.0) → Edge Device RX
- NUC980 UART1 RX (PA.1) → Edge Device TX
Auto-Link via UART
To enable automatic UART pairing between the ERMI Controller and the edge device, connect NUC980’s UART8 interface—specifically PC.12 (TX), PC.13 (RX), and VSS—to the UART port of the edge device.
This UART connection should use a non-system debug UART, allowing the NUC980 to detect and automatically establish communication with the edge device.
For edge devices that implement NC-SI (Network Controller Sideband Interface) designs, please ensure that this UART-based auto-link pairing method is supported to maintain compatibility and functionality.
10/100Mb Ethernet
To establish an Ethernet connection on the ERMI Controller, connect the NUC980 RMII interface—specifically GPIO pins PF.9, PF.7, PF.5, PF.3, PF.1, PF.8, PF.6, PF.4, PF.2, PF.0, along with nRESET—to the Ethernet PHY.
Edge Device Power ON/OFF Detection
To implement the power ON/OFF detection function for the edge device, connect NUC980 GPIO PC.4 to the 3.3V Power Good (PG) output from the motherboard or to the Digital Output (DO) signal from the chassis.
-
When the edge device is powered ON, a stable high-level signal (3.3V) is output, notifying the ERMI Controller that the device is active.
-
When the edge device is powered OFF, a stable low-level signal (0V) is output, indicating to the ERMI Controller that the device is shut down.
The power ON/OFF detection feature is controlled via GPIO pin PC.14, which should be routed externally to allow system-level control (e.g., via DIP switch or other circuitry) for flexible deployment.
- When PC.14 is externally pulled LOW, the power detection circuit is enabled.
NC-SI
Connect NUC980’s PF[1~7] to the edge device's NIC (Intel i210) using the NUC980 RMII interface. For powering the NIC, use independent power sources: 5V_Standby and 3.3V_LAN Standby, along with a dedicated clock source. This setup ensures that the NIC remains unaffected by the power ON/OFF cycles of the edge device, thereby maintaining a stable external connection.
Additionally, please make sure that clock buffer is positioned between the 50MHz OSC, i210, and NUC980 RMII.
Wireless Communication
When designing wireless communication systems, connect USB0_DM, USB0_DP, and USB0_ID to the ERMI Controller. By default, the NUC980 USB operates in device mode, as the USB0_ID pin is internally pulled up.
To enable communication via the USB interface, the NUC980 must be switched to host mode. This is achieved by shorting USB0_ID to VSS.
When operating in host mode, the NUC980 supports connectivity via either Wi-Fi or a 4G cellular network.